Siemens High Speed Counter and Encoder Module SIMATIC 505 Manuel d'utilisateur télécharger pdf (Page 30)

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Programming

3-3

Series

505 High Speed Counter

and Encoder Module User

’

s Manual

Inhibit Status. Each

channel has an Inhibit Status bit in the status word. If

the channel’

Inhibit

field input is active or if its Inhibit Command bit is 1

(see Setup W

ord, Section 3.1.3), this bit will be 1 and the counter will not

count. Otherwise, this bit will be 0.

Output Status.

Each channel has an Output 1 Status and an Output 2

Status bit in the status word. If the corresponding field output is on, the bit

will be 1. Otherwise, the bit will be 0.

3.1.2

WX2 and WX3

ord 2 (WX2)

contains

the current value of the Channel 1 count

(Channel Count)

, and W

ord 3 (WX3)

contains

the current value of the Channel 2

count register

. These values are unsigned integers between 0 and 65,535

(inclusive).

3.1.3

WY4 (Setup W

ord) W

ord 4 (WY4) is the module setup word. The controller uses eight bits to

control the HSC module’

s operation. See Figure 3-2.

Reserved and should be set to 0 (off)

CH 1 — INHIBIT

(1 = Inhibits counts; default: 0)

CH 1 — RESET

(1 = Reset counter; default: 0)

CH 1 — OUTPUT 1

0: Count



P = On (default)

1: Count < P = On

CH 1 — OUTPUT 2

CH 2 — INHIBIT

(1 = Inhibits counts; default: 0)

CH 2 — RESET

(1 = Reset counter; default: 0)

CH 2 — OUTPUT 1

CH 2 — OUTPUT 2

BIT

0: Count



P = On (default)

1: Count < P = On

MSB

LSB

Figure 3-2

Setup W

d For

mat

1 2 ... 25 26 27 28 29 30 31 32 33 34 35 ... 52 53

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Siemens High Speed Counter and Encoder Module SIMATIC 505 Manuel d'utilisateur Page 30

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